As is well known to those of skill in the art, data stored in a volatile memory cell such as a dynamic random access memory (DRAM) cell may be lost over time. In particular, the memory cell stores a signal level (such as a voltage level) that represents the value of the data stored in the cell. For example, a source voltage level may, in certain volatile memory devices, represent a data value of logic ‘1’ and a ground voltage level may represent a data value of logic ‘0’. Unfortunately, a well-known memory-cell leakage phenomenon may cause the stored signal level to degrade over time. Unless corrective action is taken, the stored signal level may eventually degrade such that it represents a data value that is different from the data value that was originally stored in the memory cell. For example, if the stored signal level is not suitably maintained, a source voltage level (logic ‘1’) may, with the passage of time, be lowered sufficiently to reach a ground voltage level (logic ‘0’).
In order to maintain the stored signal level, an integrated circuit that contains one or more volatile memory cells may periodically perform a refresh operation. During a general refresh cycle in a volatile memory device, the sense amplifier reads the data stored in a memory cell, amplifies the read signal level to a desired value and then stores (rewrites) the resulting signal level back into the memory cell.
During normal operation of an integrated circuit that includes a volatile memory cell, the electronic system that includes the integrated circuit periodically generates an auto-refresh command that initiates the refresh operation on the volatile memory cell. The integrated circuit may include a refresh address counter (or an address generator) that is used to specify, for example, the rows of memory cells that are to be refreshed. In response to the auto-refresh command, the integrated circuit performs an auto-refresh operation. During the auto-refresh operation, the integrated circuit may, for example, refresh memory cells of the addressed row and then increase or decrease a counter value by 1 so that the next auto-refresh operation will refresh the memory cells of the next row. After all the rows are refreshed, the counter may be re-initialized so that the integrated circuit can repeat the refresh process. It will be appreciated that more or less than one row of memory cells may be refreshed at one time, and the other methods may be used for selecting the memory cells that are to be refreshed as part of a particular refresh operation.
The period of time that it takes to refresh all of the memory cells in the volatile memory may be selected to ensure that data is not lost from the memory cells due to the above-described degradation of stored signal levels that may occur in volatile memory devices. For example, an integrated circuit that includes 4096 rows of memory cells may, for example, refresh each memory cell at least once every 64 milliseconds. Thus, in order to refresh all of the rows of memory cells in this particular integrated circuit, the electronic system performs at least 4096 auto-refresh operations every 64 milliseconds.
Conventionally, the electric system that periodically generates the auto-refresh commands does so using software-based auto-refresh control logic. The inclusion of such logic in the electronic system causes an increase in the software/hardware loads of the electronic system.